Pseudo-2D superconducting quantum computing circuit for the surface
code: the proposal and preliminary tests
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by
H. Mukai, K. Sakata, S.J. Devitt, R. Wang, Y. Zhou, Y. Nakajima and
J.S. Tsai
2019
Abstract
Of the many potential hardware platforms, superconducting quantum circuits
have become the leading contender for constructing a scalable quantum computing
system. All current architecture designs necessitate a 2D arrangement of
superconducting qubits with nearest neighbour interactions, compatible with
powerful quantum error correction using the surface code. A major hurdle for
scalability in superconducting systems is the so called wiring problem, where
qubits internal to a chip-set become inaccessible for external control/readout
lines. Current approaches resort to intricate and exotic 3D wiring and
packaging technology which is a significant engineering challenge to realize,
while maintaining qubit fidelity. Here we solve this problem and present a
modified superconducting scalable micro-architecture that does not require any
3D external line technology and reverts back to a completely planar design.
This is enabled by a new pseudo-2D resonator network that provides inter-qubit
connections via airbridges. We carried out experiments to examine the
feasibility of the newly introduced airbridge component. The measured quality
factor of these new inter-qubit resonators is sufficient for high fidelity
gates, below the threshold for the surface code, with negligible measured
cross-talk. The resulting physical separation of the external wirings and the
inter-qubit connections on-chip should reduce cross-talk and decoherence as the
chip-set increases in size. This result demonstrates that a large-scale, fully
error corrected quantum computer can be constructed by monolithic integration
technologies without additional overhead and without special packaging
know-hows.
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