High Level Synthesis Of Canny Edge Detection Algorithm On Zynq Platform
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by
Hanaa M. Abdelgawad, Mona Safar, Ayman M. Wahba
2015
Abstract
Real time image and video processing is a demand in<br>
many computer vision applications, e.g. video surveillance, traffic<br>
management and medical imaging. The processing of those video<br>
applications requires high computational power. Thus, the optimal<br>
solution is the collaboration of CPU and hardware accelerators. In<br>
this paper, a Canny edge detection hardware accelerator is proposed.<br>
Edge detection is one of the basic building blocks of video and image<br>
processing applications. It is a common block in the pre-processing<br>
phase of image and video processing pipeline. Our presented<br>
approach targets offloading the Canny edge detection algorithm from<br>
processing system (PS) to programmable logic (PL) taking the<br>
advantage of High Level Synthesis (HLS) tool flow to accelerate the<br>
implementation on Zynq platform. The resulting implementation<br>
enables up to a 100x performance improvement through hardware<br>
acceleration. The CPU utilization drops down and the frame rate<br>
jumps to 60 fps of 1080p full HD input video stream.
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