Self-Learning Tuning for Post-Silicon Validation release_ldhe5ud7hbghtkz4vz7oflfpdi

by Peter Domanski, Dirk Plüger, Jochen Rivoir, Raphaël Latty

Released as a article .

2021  

Abstract

Increasing complexity of modern chips makes design validation more difficult. Existing approaches are not able anymore to cope with the complexity of tasks such as robust performance tuning in post-silicon validation. Therefore, we propose a novel approach based on learn-to-optimize and reinforcement learning in order to solve complex and mixed-type tuning tasks in a efficient and robust way.
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Type  article
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Date   2021-11-17
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Language   en ?
arXiv  2111.08995v1
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