Area-power-delay trade-off in logic synthesis release_ibkgcrocurecdie5dlwsmhpyzy

by MRCM Michel Berkelaar, JAG Jochen Jess, WMG Wim Van Bokhoven, JFM Frans Theeuwen

Published by Technische Universiteit Eindhoven.

1992  

Archived Files and Locations

application/pdf  13.0 MB
file_riwl6jrsgjgd5b3d5xskftdfg4
pure.tue.nl (publisher)
web.archive.org (webarchive)
Read Archived PDF
Preserved and Accessible
Type  article
Stage   published
Year   1992
Language   en ?
Work Entity
access all versions, variants, and formats of this works (eg, pre-prints)
Catalog Record
Revision: 25842139-0dd4-49ee-a00d-3566b1a894d6
API URL: JSON