An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects release_4jlyj72oejcxbpb6kcwe3opsea

by N. Houarche, M. Comte, M. Renovell, A. Czutro, P. Engelke, I. Polian, B. Becker

Published in IEEE VLSI Test Symposium by IEEE.

2009   p21-26

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