A PRET microarchitecture implementation with repeatable timing and competitive performance release_3ajnivojhvhcnliv7totbp2ywy

by Isaac Liu, Jan Reineke, David Broman, Michael Zimmer, Edward A. Lee

Published in International Conference on Computer Design by IEEE.

2012   p87-93

Archived Files and Locations

application/pdf  184.4 kB
file_yilv5muwnra5rorpv7h27ytnc4
web.archive.org (webarchive)
chess.eecs.berkeley.edu (web)
application/pdf  273.8 kB
file_buqiwdxdc5gm7jvnh3o5so4c6u
kth.diva-portal.org (web)
web.archive.org (webarchive)
web.archive.org (webarchive)
www.diva-portal.org (web)
application/pdf  184.3 kB
file_oef2ph3d2vhafador25z7aajby
liu.diva-portal.org (web)
web.archive.org (webarchive)
Read Archived PDF
Preserved and Accessible
Type  paper-conference
Stage   published
Year   2012
Work Entity
access all versions, variants, and formats of this works (eg, pre-prints)
Catalog Record
Revision: 8cb441c9-534b-44c7-b8ac-c56e5bca5156
API URL: JSON